1. Field of Invention
The present invention relates to a semiconductor device and a method for manufacturing thereof. More particularly, the present invention relates to a field plate of a high voltage device and a method for manufacturing thereof.
2. Description of Related Art
With the decreasing of the semiconductor device's size, the channel length is decreased. Therefore, the operation speed of the transistor is increased. However, the short channel effect is getting seriously as the channel length is decreased. According to the well known equation: electric field=voltage/length, the intensity of the electric field is increased with the decreasing of the channel length while the applied voltage is constant. Hence, the energy of the electrons within the channel is dramatically increased with the enhancing of the electric field so as to increase possibility of the electrical breakdown of the device. Moreover, as for the high voltage device, when the device integration of the integrated circuit is increased, the performance of the high voltage device is also an important issue to be concerned. Therefore, during the formation of the high voltage device, it is necessary to specially arrange the elements of the high voltage device so as to increase the sustainability of the high voltage device while operating under the high voltage.
Currently, during the formation of the high voltage device, an isolation structure is formed in the substrate and then a dielectric layer is formed over the substrate. Thereafter, a portion of the dielectric layer is removed to expose the substrate and a portion of the isolation structure. Further, a conductive layer is formed over the substrate and then a portion of the conductive layer is patterned. Nevertheless, during the patterning process performed on the conductive layer located on the substrate, a portion of the top surface of the substrate is damaged to form pinholes therein. That is, since the material for forming the conductive layer is similar to that of the substrate, there is no etching selectivity difference. Therefore, the top surface of the substrate is easily to be damaged and leads to the unstable electrical performance of the later formed device. Hence, the reliability of the device is decreased.